Desenvolvimento de dispositivo limitador de corrente supercondutor resistivo modular

Abstract

The development of a superconducting fault current limiter device of resistive type with modular design was the main purpose of this thesis. As an attempt of reaching an efficient device that shows high limitation electrical resistance, current problems involving this particular kind of limiter were detailed such as: superconductor sample current injection technique, power losses inside the cryostat and limitation of the longitudinal dimension of the superconductor chip. Additionally, standard analysis procedures and hardware were created and left available for future use with a variety of superconducting fault current limiter types. All the development process that led to the definitive device configuration was presented including the devices that weren’t effective when working with higher current levels. Finally, practical current limitation experiments were carried out at a “stack” type device configured as “mono-layer” limiter. In order to demonstrate the advantages of the proposed device in comparison with the conventional devices, simulations of current limitation of the stack device configured as multi-layer were conducted concluding the study.